Project Status
MAX5190 DAC board
LTC1746 ADC board
USB 2.0 interface board
I/O test board
GNU Radio integration
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Interface board firmware

Firmware release V0.3.3 available:

Testing release V0.4.1 available:

The SSRP firmware is primarily responsible for setting up and controlling data transfer between the high speed parallel data bus and the USB bus and for daughterboard control and initialization. A large portion of the USRP firmware should be useful on the SSRP because both devices utilize the same microcontroller. The FX2 controller has an interesting design in that it downloads its firmware over the USB bus when it is first connected, enabling rapid software changes. To date firmware has been developed in C using the sdcc compiler. The fx2_programmer utility is also very useful for programming the device and debugging. Synchronous data transfer firmware has been used to transfer more than 40MB/s of data from the parallel data bus to the host computer. Several versions of this firmware, along with the corresponding host utilities are available in the above tarballs. Basic led flashing and other hardware check code is included as well.

Due to several difficulties encountered by the USRP project using the FX2 parallel data bus in General Purpose InterFace (GPIF) mode, the I/O test board and the LTC1746 board are designed to transfer data to the FX2 controller in slave FIFO mode. This design simplifies the firmware design and eliminates the need to use the GPIF mode. In this mode data is latched into the FIFO on asserted-unasserted transitions of the FIFO write strobe (nSLWR). The LTC1746 will drive this line from its "output data valid" line, automatically clocking data into the FIFO. While operating in this mode, sustained transfer rates of 41MB/sec have been achieved.

(C) David Carr 2004-2005